An analysis of the failure modes of DRAM in memory embedded modules has determined that DRAM components with suboptimal reliability tend to fail during the first three months of use. As newer DRAMs advance to smaller process geometries, there can be a greater risk for chips that contain weak bits (a microscopic defect in an individual cell). This is not enough to cause a DRAM failure outright, but could exhibit a single-bit error within weeks after initial field operation begins. Using Test During Burn-In (TDBI) helps eliminate any potential early failures and improve the overall reliability of memory products. Although most DRAM chips undergo a static burn-in at the chip level, TDBI offers a more comprehensive testing approach that implements a 24-hour burn-in test at the module level while dynamically running and checking test patterns as the module is performing under stress conditions. Studies conducted by various memory embedded manufacturers show that using TDBI chambers can reduce early failures by up to 90 percent.